Dynamic reconfigurability in embedded systems design

Contact person: Marco D. Santambrogio


Reconfigurable devices are widely adopted, in particular in prototyping embedded systems, since they reduce significantly the time of design. The technological advances of the reconfigurable platforms both in terms of available functionalities and performance, have shown the potential to become the implementation platform for a number of systems requiring configurability and flexibility at run-time. To enable the exploitation of dynamic reconfigurability a key point is to make the designers able to model and validate reconfigurable systems, and to assist them in the evaluation of different target reconfigurable architectures. In this research, the most important problems addressed were the modeling of reconfigurability in embedded systems at a high level of abstraction, the subsequent synthesis on reconfigurable devices, the definition of feasible architectures for the effective exploitation of the reconfigurable hardware capabilities, also taking into account the virtualisation possibilities offered by an operating system.


Projects’ website:


Recent selected publications:

  • M. D. Santambrogio, M. Redaelli and M. Maggioni, "Task graph scheduling for reconfigurable architectures driven by reconfigurations hiding and resources reuse," in Proc. ACM Great Lakes Symposium on VLSI, pp. 21-26, 2009. bibtex doi
    @inproceedings {SRM09.GLSVLSI,
      doi = {http://doi.acm.org/10.1145/1531542.1531552},
      pages = {21-26},
      year = {2009},
      booktitle = {Proc. ACM Great Lakes Symposium on VLSI},
      title = {Task graph scheduling for reconfigurable architectures driven by reconfigurations hiding and resources reuse},
      yy = {2009},
      author = {Marco D. Santambrogio and M. Redaelli and M. Maggioni} }
  • , "Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices," in Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 421-424, 2009. bibtex doi
    @inproceedings {CFMRSS2009.GLSVLSI,
      doi = {http://doi.acm.org/10.1145/1531542.1531638},
      pages = {421-424},
      year = {2009},
      booktitle = {Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI)},
      title = {Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices},
      yy = {2009},
      author = {Dario Cozzi and Claudia Far{`e} and Alessandro Meroni and Vincenzo Rana and Marco D. Santambrogio and Donatella Sciuto} }
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