Refereed International Conferences

2013

  • A. A. Nacci, V. Rana, F. Bruschi, D. Sciuto, I. Beretta and D. Atienza, "A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices," in Proc. Design Automation Conference, pp. 52, 2013. bibtex doi
    @inproceedings {DBLP:conf/dac/NacciRBSBA13,
      doi = {http://doi.acm.org/10.1145/2463209.2488797},
      pages = {52},
      year = {2013},
      booktitle = {Proc. Design Automation Conference},
      title = {A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices},
      yy = {2013},
      author = {Alessandro Antonio Nacci and Vincenzo Rana and Francesco Bruschi and Donatella Sciuto and Ivan Beretta and David Atienza} }
  • C. Bolchini, M. Carminati, A. Miele and E. Quintarelli, "A framework to model self-adaptive Computing Systems," in Proc. NASA/ESA Conference on Adaptive Hardware and Systems, pp. 71-78, 2013. bibtex doi
    @inproceedings {DBLP:conf/ahs/BolchiniCMQ13,
      doi = {http://dx.doi.org/10.1109/AHS.2013.6604228},
      pages = {71-78},
      year = {2013},
      booktitle = {Proc. NASA/ESA Conference on Adaptive Hardware and Systems},
      title = {A framework to model self-adaptive Computing Systems},
      yy = {2013},
      author = {Cristiana Bolchini and Matteo Carminati and Antonio Miele and Elisa Quintarelli} }
  • C. Pilato, R. Cattaneo, G. Durelli, A. A. Nacci, M. D. Santambrogio and D. Sciuto, "A2B: An integrated framework for designing heterogeneous and reconfigurable systems," in Proc. NASA/ESA Conference on Adaptive Hardware and Systems, pp. 198-205, 2013. bibtex doi
    @inproceedings {DBLP:conf/ahs/PilatoCDNSS13,
      ee = {http://dx.doi.org/10.1109/AHS.2013.6604246},
      pages = {198-205},
      year = {2013},
      booktitle = {Proc. NASA/ESA Conference on Adaptive Hardware and Systems},
      title = {A2B: An integrated framework for designing heterogeneous and reconfigurable systems},
      yy = {2013},
      author = {Christian Pilato and Riccardo Cattaneo and Gianluca Durelli and Alessandro Antonio Nacci and Marco Domenico Santambrogio and Donatella Sciuto} }
  • A. A. Nacci, V. Rana, F. Bruschi, D. Sciuto, I. Beretta and D. Atienza, "A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices," in Proc. Design Automation Conf., pp. 52, 2013. bibtex doi
    @inproceedings {NRBSBA2013,
      doi = {http://doi.acm.org/10.1145/2463209.2488797},
      pages = {52},
      year = {2013},
      booktitle = {Proc. Design Automation Conf.},
      title = {A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices},
      yy = {2013},
      author = {Alessandro Nacci and Vincenzo Rana and Francesco Bruschi and Donatella Sciuto and I. Beretta and D. Atienza} }
  • D. Zoni and W. Fornaciari, "Sensor-wise methodology to face NBTI stress of NoC buffers," in Proc. Design, Automation and Test in Europe Conf., pp. 1038-1043, 2013. bibtex doi
    @inproceedings {ZF2013,
      ee = {http://dl.acm.org/citation.cfm?id=2485537},
      pages = {1038-1043},
      year = {2013},
      booktitle = {Proc. Design, Automation and Test in Europe Conf.},
      title = {Sensor-wise methodology to face NBTI stress of NoC buffers},
      yy = {2013},
      author = {Davide Zoni and William Fornaciari} }

2012
  • C. Bolchini, A. Miele and D. Sciuto, "An adaptive approach for online fault management in many-core architectures," in Proc. Design, Automation & Test in Europe Conf., pp. 1429-1432, 2012. bibtex doi
    @inproceedings {DBLP:conf/date/BolchiniMS12,
      ee = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=6176589},
      pages = {1429-1432},
      year = {2012},
      booktitle = {Proc. Design, Automation {&} Test in Europe Conf.},
      title = {An adaptive approach for online fault management in many-core architectures},
      yy = {2012},
      author = {Cristiana Bolchini and Antonio Miele and Donatella Sciuto} }
  • C. Bolchini, A. Miele and C. Sandionigi, "Increasing autonomous fault-tolerant FPGA-based systems' lifetime," in Proc. European Test Symposium, pp. 1-6, 2012. bibtex doi
    @inproceedings {BMS12,
      ee = {http://dx.doi.org/10.1109/ETS.2012.6233006},
      pages = {1-6},
      year = {2012},
      booktitle = {Proc. European Test Symposium},
      title = {Increasing autonomous fault-tolerant FPGA-based systems' lifetime},
      yy = {2012},
      author = {Cristiana Bolchini and Antonio Miele and Chiara Sandionigi} }
  • C. Bolchini, A. Miele, C. Sandionigi, M. Ottavi, S. Pontarelli, A. Salsano, C. Metra, M. Oma na, D. Rossi, M. S. Reorda, L. Sterpone, M. Violante, S. Gerardin, M. Bagatin and A. Paccagnella, "High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies," in Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI and Nanotechnology Systems, pp. 121-125, 2012. bibtex doi
    @inproceedings {DBLP:conf/dft/BolchiniMSOPSMORRSVGBP12,
      ee = {http://doi.ieeecomputersociety.org/10.1109/DFT.2012.6378211},
      pages = {121-125},
      year = {2012},
      booktitle = {Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI and Nanotechnology Systems},
      title = {High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies},
      yy = {2012},
      author = {Cristiana Bolchini and Antonio Miele and Chiara Sandionigi and Marco Ottavi and Salvatore Pontarelli and Adelio Salsano and Cecilia Metra and Martin Oma{~n}a and Daniele Rossi and Matteo Sonza Reorda and Luca Sterpone and Massimo Violante and Simone Gerardin and M. Bagatin and Alessandro Paccagnella} }

2011
  • C. Bolchini, A. Miele and C. Pilato, "Combined architecture and hardening techniques exploration for reliable embedded system design," in Proc. ACM Great Lakes Symposium on VLSI, pp. 301-306, 2011. bibtex doi
    @inproceedings{GLSVLSI2011.BMP,
      author = {Cristiana Bolchini and Antonio Miele and Christian Pilato},
      title = {Combined architecture and hardening techniques exploration for reliable embedded system design},
      booktitle = {Proc. ACM Great Lakes Symposium on VLSI},
      year = {2011},
      pages = {301-306},
      doi = {http://doi.acm.org/10.1145/1973009.1973069} }
  • F. Ferrandi, D. Pandini and C. Pilato, "A design methodology for the automatic sizing of standard-cell libraries," in Proc. ACM Great Lakes Symposium on VLSI, pp. 151-156, 2011. doi
  • C. Bolchini and A. Miele, "An Application-Level Dependability Analysis Framework for Embedded Systems," in Proc. IEEE Int. Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems., pp. 171-178, 2011. doi
  • L. Amati, C. Bolchini and F. Salice, "Optimal Test Set Selection for Fault Diagnosis Improvement," in Proc. IEEE Intl Symp on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT, pp. 93-99, 2011. doi
  • C. Bolchini, A. Miele and C. Sandionigi, "Automated Resource-Aware Floorplanning of Reconfigurable Areas in Partially-Reconfigurable FPGA Systems," in Proc. IEEE Int. Conf. Field Programmable Logic and Applications, pp. 532-538, 2011. bibtex doi
    @inproceedings {FPL2011,
      doi = {http://doi.ieeecomputersociety.org/10.1109/FPL.2011.104},
      pages = {532-538},
      month = {September},
      year = {2011},
      booktitle = {Proc. IEEE Int. Conf. Field Programmable Logic and Applications},
      title = {Automated Resource-Aware Floorplanning of Reconfigurable Areas in Partially-Reconfigurable FPGA Systems},
      yy = {2011},
      mm = {9},
      author = {Cristiana Bolchini and Antonio Miele and Chiara Sandionigi} }
  • C. Pilato, F. Ferrandi and D. Sciuto, "A design methodology to implement memory accesses in high-level synthesis," in Proc. Int. Conf. Hardware/Software Codesign and System Synthesis, pp. 49-58, 2011. doi
  • F. Bruschi, F. Perini, V. Rana and D. Sciuto, "An efficient Quantum-Dot Cellular Automata adder," in Proc. Design, Automation and Test in Europe, pp. 1220-1223, 2011. bibtex doi
    @inproceedings {BruschiPRS11,
      doi = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5763318},
      pages = {1220-1223},
      year = {2011},
      month = {March},
      booktitle = {Proc. Design, Automation and Test in Europe},
      title = {An efficient Quantum-Dot Cellular Automata adder},
      yy = {2011},
      mm = {3},
      author = {Francesco Bruschi and F. Perini and Vincenzo Rana and Donatella Sciuto} }

2010
  • G. Mariani, P. Avasare, G. Vanmeerbeeck, C. Ykman-Couvreur, G. Palermo, C. Silvano and V. Zaccaria, "An industrial design space exploration framework for supporting run-time resource management on multi-core systems," in Proc. Design, Automation and Test in Europe (DATE), pp. 196-201, 2010. doi
  • A. Gellert, G. Palermo, V. Zaccaria, A. Florea, L. N. Vintan and C. Silvano, "Energy-performance design space exploration in SMT architectures exploiting selective load value predictions," in Proc. Design, Automation and Test in Europe (DATE), pp. 271-274, 2010. bibtex doi
    @inproceedings {DATE2010.GPZFVS,
      ee = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5457197},
      pages = {271-274},
      year = {2010},
      booktitle = {Proc. Design, Automation and Test in Europe (DATE)},
      title = {Energy-performance design space exploration in SMT architectures exploiting selective load value predictions},
      yy = {2010},
      author = {A. Gellert and Gianluca Palermo and Vittorio Zaccaria and A. Florea and L. N. Vintan and Cristina Silvano} }
  • A. Tumeo, F. Regazzoni, G. Palermo, F. Ferrandi and D. Sciuto, "A reconfigurable multiprocessor architecture for a reliable face recognition implementation," in Proc. Design, Automation and Test in Europe (DATE), pp. 319-322, 2010. bibtex doi
    @inproceedings {DATE2010.TRPFS,
      ee = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5457185},
      pages = {319-322},
      year = {2010},
      booktitle = {Proc. Design, Automation and Test in Europe (DATE)},
      title = {A reconfigurable multiprocessor architecture for a reliable face recognition implementation},
      yy = {2010},
      author = {A. Tumeo and F. Regazzoni and Gianluca Palermo and Fabrizio Ferrandi and Donatella Sciuto} }
  • V. Rana and D. Sciuto, "A novel design framework for the design of reconfigurable systems based on NoCs," in Proc. ACM Great Lakes Symposium on VLSI, pp. 1-2, 2010. bibtex doi
    @inproceedings {GLSVLSI2010.RS,
      doi = {http://doi.acm.org/10.1145/1785481.1785483},
      pages = {1-2},
      year = {2010},
      booktitle = {Proc. ACM Great Lakes Symposium on VLSI},
      title = {A novel design framework for the design of reconfigurable systems based on NoCs},
      yy = {2010},
      author = {Vincenzo Rana and Donatella Sciuto} }
  • M. Ceriani, F. Ferrandi, P. L. Lanzi, D. Sciuto and A. Tumeo, "Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation," in Proc. Genetic and Evolutionary Computation Conf. (GECCO), pp. 1267-1274, 2010. bibtex doi
    @inproceedings {GECCO2010.CFLST,
      doi = {http://doi.acm.org/10.1145/1830483.1830710},
      pages = {1267-1274},
      year = {2010},
      booktitle = {Proc. Genetic and Evolutionary Computation Conf. (GECCO)},
      title = {Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation},
      yy = {2010},
      author = {M. Ceriani and Fabrizio Ferrandi and Pier Luca Lanzi and Donatella Sciuto and A. Tumeo} }
  • A. Miele, C. Bolchini, C. Sandionigi, N. Battezzati, L. Sterpone and M. Violante, "An integrated flow for the design of hardened circuits on SRAM-based FPGAs," in Proc. IEEE European Test Symposium (ETS), pp. 214-219, 2010. bibtex doi
    @inproceedings{ETS2010,
      author = {Antonio Miele and Cristiana Bolchini and Chiara Sandionigi and N. Battezzati and L. Sterpone and M. Violante},
      Booktitle = {Proc. IEEE European Test Symposium},
      Doi = {http://dx.doi.org/10.1109/ETSYM.2010.5512757},
      Keywords = {Reconfiguration, SRAM-based FPGAs, R4R},
      Month = {May},
      Pages = {214-219},
      Title = {An integrated flow for the design of hardened circuits on SRAM-based FPGAs},
      Year = {2010},
      }
  • C. Bolchini and A. Miele, "Reliability-Driven System-Level Synthesis of Embedded Systems," in Proc. IEEE Intl Symp on Defect and Fault Tolerance in VLSI Systems, DFT, pp. 35-43, 2010. bibtex doi
    @inproceedings {DFT2010.BM,
      year = {2010},
      title = {Reliability-Driven System-Level Synthesis of Embedded Systems},
      pages = {35-43},
      month = {October},
      keywords = {System-Level Synthesis, Reliability-Aware},
      doi = {http://dx.doi.org/10.1109/DFT.2010.11},
      booktitle = {Proc. IEEE Intl Symp on Defect and Fault Tolerance in VLSI Systems, DFT},
      yy = {2010},
      mm = {10},
      author = {Cristiana Bolchini and Antonio Miele} }
  • L. Amati, C. Bolchini and F. Salice, "Test Selection Policies for Faster Incremental Fault Detection," in Proc. IEEE Intl Symp on Defect and Fault Tolerance in VLSI Systems, DFT, pp. 310-318, 2010. bibtex doi
    @inproceedings {DFT2010.ABS,
      year = {2010},
      title = {Test Selection Policies for Faster Incremental Fault Detection},
      pages = {310-318},
      month = {Oct},
      keywords = {Incremental Functional Diagnosis, Test Set},
      doi = {http://dx.doi.org/10.1109/DFT.2010.45},
      booktitle = {Proc. IEEE Intl Symp on Defect and Fault Tolerance in VLSI Systems, DFT},
      yy = {2010},
      mm = {10},
      author = {Luca Amati and Cristiana Bolchini and Fabio Salice} }
  • L. Amati, C. Bolchini, F. Salice and F. Franzoso, "Improving Fault Diagnosis Accuracy by Automatic Test Set Modification," in Proc. IEEE Int. Test Conference, 2010. doi
  • C. Alippi, G. Boracchi and M. Roveri, "Adaptive Classifiers with ICI-Based Adaptive Knowledge Base Management," in Proc. Intl. Conf. Artificial Neural Networks (ICANN), pp. 458-467, 2010. bibtex doi
    @inproceedings {ABR2010.ICANN,
      doi = {http://dx.doi.org/10.1007/978-3-642-15822-3_56},
      pages = {458-467},
      year = {2010},
      booktitle = {Proc. Intl. Conf. Artificial Neural Networks (ICANN)},
      title = {Adaptive Classifiers with ICI-Based Adaptive Knowledge Base Management},
      yy = {2010},
      author = {Cesare Alippi and Giacomo Boracchi and Manuel Roveri} }
  • F. Ferrandi, C. Pilato, D. Sciuto and A. Tumeo, "Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs," in Proc. Asia South Pacific Design Automation Conference, pp. 799-804, 2010. bibtex doi
    @inproceedings {FPST2010ASPDAC,
      doi = {http://dx.doi.org/10.1109/ASPDAC.2010.5419782},
      pages = {799-804},
      year = {2010},
      booktitle = {Proc. Asia South Pacific Design Automation Conference},
      title = {Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs},
      yy = {2010},
      author = {Fabrizio Ferrandi and Christian Pilato and Donatella Sciuto and A. Tumeo} }
  • M. Lattuada and F. Ferrandi, "Performance modeling of embedded applications with zero architectural knowledge," in Proc. Int. Conf. on Hardware/Software Codesign and System Synthesis, pp. 277-286, 2010. doi
  • V. Rana and D. Sciuto, "A novel design framework for the design of reconfigurable systems based on NoCs," in Proc. ACM Great Lakes Symposium on VLSI, pp. 1-2, 2010. bibtex doi
    @inproceedings {RS2010,
      doi = {http://doi.acm.org/10.1145/1785481.1785483},
      pages = {1-2},
      year = {2010},
      booktitle = {Proc. ACM Great Lakes Symposium on VLSI},
      title = {A novel design framework for the design of reconfigurable systems based on NoCs},
      yy = {2010},
      author = {Vincenzo Rana and Donatella Sciuto} }
  • G. Mariani, A. Brankovic, G. Palermo, J. Jovic, V. Zaccaria and C. Silvano, "A correlation-based design space exploration methodology for multi-processor systems-on-chip," in Proc. ACM Design Automation Conference, pp. 120-125, 2010. bibtex doi
    @inproceedings {MCDS2010,
      keywords = {design space exploration, kriging, multi-processor systems-on-chip, response surface},
      doi = {http://doi.acm.org/10.1145/1837274.1837307},
      pages = {120--125},
      month = {June},
      year = {2010},
      booktitle = {Proc. ACM Design Automation Conference},
      title = {A correlation-based design space exploration methodology for multi-processor systems-on-chip},
      yy = {2010},
      mm = {6},
      author = {G. Mariani and A. Brankovic and Gianluca Palermo and J. Jovic and Vittorio Zaccaria and Cristina Silvano} }
  • A. Volpatto, F. Maggi and S. Zanero, "Effective multimodel anomaly detection using cooperative negotiation," in Proc. Int. Conf. Decision and Game Theory for Security, pp. 180-191, 2010. doi
  • P. Milani Comparetti, G. Salvaneschi, C. Kolbitsch, E. Kirda, C. Kruegel and S. Zanero, "Identifying Dormant Functionality in Malware Programs," in Proc. IEEE Symp. Security and Privacy, pp. 61-76, 2010. doi
  • S. Zanero, "Observing the tidal waves of malware: experiences from the WOMBAT project," in Proc. Vaagdevi International Conference on Information Technology for Real World Problems, pp. 1-8, 2010. doi
  • F. Maggi, "A Recognizer of Rational Trace Languages," in Computer and Information Technology, International Conference on, Vol. 0, pp. 257-264, 2010. doi
  • F. Maggi, "Are the Con Artists Back? A Preliminary Analysis of Modern Phone Frauds," in Computer and Information Technology, International Conference on, Vol. 0, pp. 824-831, 2010. doi
  • W. Robertson, F. Maggi, C. Kruegel and G. Vigna, "Effective Anomaly Detection with Scarce Training Data," in Proc. of the Network and Distributed System Security Symposium (NDSS), 2010.

2009
  • G. Beltrame, C. Bolchini and A. Miele, "Multi-level fault modeling for transaction-level specifications," in Proc. ACM Great Lake Symposium on VLSI (GLSVLSI), pp. 87-92, 2009. bibtex doi
    @inproceedings {GLSVLSI2009.BBM,
      year = {2009},
      title = {Multi-level fault modeling for transaction-level specifications},
      pages = {87-92},
      month = {May},
      keywords = {Fault Models, SystemC},
      doi = {http://doi.acm.org/10.1145/1531542.1531565},
      booktitle = {Proc. ACM Great Lake Symposium on VLSI (GLSVLSI)},
      yy = {2009},
      mm = {5},
      author = {G. Beltrame and Cristiana Bolchini and Antonio Miele} }
  • L. Amati, C. Bolchini, L. Frigerio, F. Salice, B. Eklow, A. Suvatne, E. Brambilla, F. Franzoso and M. Martin, "An incremental approach to functional diagnosis," in Proc. IEEE Intl Symp on Defect and Fault Tolerance of of VLSI Systems (DFT), pp. 392-400, 2009. bibtex doi
    @inproceedings {DFT2009.ABFSESBFM,
      year = {2009},
      title = {An incremental approach to functional diagnosis},
      pages = {392-400},
      month = {Oct},
      keywords = {Diagnosis},
      doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2009.29},
      booktitle = {Proc. IEEE Intl Symp on Defect and Fault Tolerance of of VLSI Systems (DFT)},
      yy = {2009},
      mm = {10},
      author = {Luca Amati and Cristiana Bolchini and L. Frigerio and Fabio Salice and B. Eklow and A. Suvatne and E. Brambilla and F. Franzoso and M. Martin} }
  • C. Bolchini, F. Castro and A. Miele, "A Fault Analysis and Classifier Framework for Reliability-Aware SRAM-based FPGA Systems," in Proc. IEEE Intl Symp on Defect and Fault Tolerance of of VLSI Systems (DFT), pp. 173-181, 2009. bibtex doi
    @inproceedings {DFT2009.BCM,
      year = {2009},
      title = {A Fault Analysis and Classifier Framework for Reliability-Aware SRAM-based FPGA Systems},
      pages = {173-181},
      month = {Oct},
      keywords = {Fault injection, SRAM-based FPGAs},
      doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2009.10},
      booktitle = {Proc. IEEE Intl Symp on Defect and Fault Tolerance of of VLSI Systems (DFT)},
      yy = {2009},
      mm = {10},
      author = {Cristiana Bolchini and F. Castro and Antonio Miele} }
  • , "Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices," in Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 421-424, 2009. bibtex doi
    @inproceedings {CFMRSS2009.GLSVLSI,
      doi = {http://doi.acm.org/10.1145/1531542.1531638},
      pages = {421-424},
      year = {2009},
      booktitle = {Proc. ACM Great Lakes Symposium on VLSI (GLSVLSI)},
      title = {Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices},
      yy = {2009},
      author = {Dario Cozzi and Claudia Far{`e} and Alessandro Meroni and Vincenzo Rana and Marco D. Santambrogio and Donatella Sciuto} }
  • F. Cancare, M. D. Santambrogio and D. Sciuto, "An application-centered design flow for self reconfigurable systems implementation," in Proc. Asia South Pacific Design Automation Conference (ASP-DAC), pp. 248-253, 2009. bibtex doi
    @inproceedings {ASPDAC2009.CSS,
      doi = {http://doi.acm.org/10.1145/1509633.1509702},
      pages = {248-253},
      year = {2009},
      booktitle = {Proc. Asia South Pacific Design Automation Conference (ASP-DAC)},
      title = {An application-centered design flow for self reconfigurable systems implementation},
      yy = {2009},
      author = {Fabio Cancare and Marco D. Santambrogio and Donatella Sciuto} }
  • A. Tumeo, M. Branca, L. Camerini, M. Ceriani, M. Monchiero, G. Palermo, F. Ferrandi and D. Sciuto, "Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform," in Proc. Asia South Pacific Design Automation Conference (ASP-DAC), pp. 317-322, 2009. bibtex doi
    @inproceedings {ASPDAC2009.TBCCMPFS,
      doi = {http://doi.acm.org/10.1145/1509633.1509717},
      pages = {317-322},
      year = {2009},
      booktitle = {Proc. Asia South Pacific Design Automation Conference (ASP-DAC)},
      title = {Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform},
      yy = {2009},
      author = {Antonino Tumeo and Marco Branca and Lorenzo Camerini and Marco Ceriani and Matteo Monchiero and Gianluca Palermo and Fabrizio Ferrandi and Donatella Sciuto} }
  • M. D. Santambrogio, M. Redaelli and M. Maggioni, "Task graph scheduling for reconfigurable architectures driven by reconfigurations hiding and resources reuse," in Proc. ACM Great Lakes Symposium on VLSI, pp. 21-26, 2009. bibtex doi
    @inproceedings {SRM09.GLSVLSI,
      doi = {http://doi.acm.org/10.1145/1531542.1531552},
      pages = {21-26},
      year = {2009},
      booktitle = {Proc. ACM Great Lakes Symposium on VLSI},
      title = {Task graph scheduling for reconfigurable architectures driven by reconfigurations hiding and resources reuse},
      yy = {2009},
      author = {Marco D. Santambrogio and M. Redaelli and M. Maggioni} }
  • A. Galante, A. Kokos and S. Zanero, "BlueBat: Towards Practical Bluetooth Honeypots," in Proc. IEEE Int. Conf. on Communications, pp. 1-6, 2009. doi
  • C. Criscione, F. Maggi, G. Salvaneschi and S. Zanero, "Integrated Detection of Attacks Against Browsers, Web Applications and Databases," in Proc. IEEE European Conf. Computer Network Defense, pp. 37-45, 2009. bibtex doi
    @inproceedings {e,
      url = {http://home.dei.polimi.it/fmaggi/downloads/publications/2009_criscione_maggi_salvaneschi_zanero_masibty.pdf},
      pages = {37--45},
      year = {2009},
      title = {Integrated Detection of Attacks Against Browsers, Web Applications and Databases},
      yy = {2009},
      author = {C. Criscione and F. Maggi and G. Salvaneschi and S. Zanero} }
  • F. Maggi, W. Robertson, C. Kruegel and G. Vigna, "Protecting a Moving Target: Addressing Web Application Concept Drift," in Proc. of the 12th Int.l Symposium on Recent Advances in Intrusion Detection (RAID), 2009. doi

2008
  • C. A. Curino, V. Rana, M. D. Santambrogio, F. Redaelli and D. Sciuto, "The Shining embedded system design methodology based on self dynamic reconfigurable architectures," in Proc. IEEE 13th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 595-600, 2008. bibtex doi
    @inproceedings {CRSRS_ASPDAC08,
      year = {2008},
      doi = {http://dx.doi.org/10.1109/ASPDAC.2008.4484021},
      pages = {595-600},
      booktitle = {Proc. IEEE 13th Asia and South Pacific Design Automation Conference (ASP-DAC)},
      title = {The Shining embedded system design methodology based on self dynamic reconfigurable architectures},
      yy = {2008},
      author = {Carlo A. Curino and Vincenzo Rana and Marco D. Santambrogio and Francesco Redaelli and Donatella Sciuto} }
  • C. Pilato, D. Loiacono, F. Ferrandi, P. L. Lanzi and D. Sciuto, "High-level Synthesis with Multi-objective Genetic Algorithm: a Comparative Encoding Analysis," in Proc. IEEE CEC 2008 - Congress on Evolutionary Computation, pp. 3333-3340, 2008. bibtex
    @inproceedings {PILATO2008:cec,
      pages = {3333-3340},
      year = {2008},
      month = {June 1-6},
      booktitle = {Proc. IEEE CEC 2008 - Congress on Evolutionary Computation},
      title = {High-level Synthesis with Multi-objective Genetic Algorithm: a Comparative Encoding Analysis},
      yy = {2008},
      mm = {0},
      author = {Christian Pilato and Daniele Loiacono and Fabrizio Ferrandi and Pier Luca Lanzi and Donatella Sciuto} }
  • C. Pilato, D. Loiacono, F. Ferrandi, P. L. Lanzi and D. Sciuto, "A Multi-Objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis," in Proc. IEEE Computer Society Annual Symposium on VLSI, pp. 417-422, 2008. bibtex
    @inproceedings {PILATO2008:isvlsi,
      pages = {417-422},
      year = {2008},
      month = {April 7-9},
      booktitle = {Proc. ISVLSI 2008 - IEEE Computer Society Annual Symposium on VLSI},
      title = {A Multi-Objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis},
      yy = {2008},
      mm = {0},
      author = {Christian Pilato and Daniele Loiacono and Fabrizio Ferrandi and Pier Luca Lanzi and Donatella Sciuto} }
  • A. Tumeo, M. Branca, L. Camerini, M. Ceriani, M. Monchiero, G. Palermo, F. Ferrandi and D. Sciuto, "A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications," in Proc. IEEE/ACM DATE 2008 - Design, Automation and Test in Europe, pp. 1039-1044, 2008. bibtex
    @inproceedings {TumeoDate2008,
      pages = {1039-1044},
      month = {March 10-14},
      year = {2008},
      booktitle = {Proc. IEEE/ACM DATE 2008 - Design, Automation and Test in Europe},
      title = {A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications},
      yy = {2008},
      mm = {0},
      author = {Antonino Tumeo and Marco Branca and Lorenzo Camerini and Marco Ceriani and Matteo Monchiero and Gianluca Palemo and Fabrizio Ferrandi and Donatella Sciuto} }
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    @inproceedings {TumeoASAP2008,
      pages = {281-286},
      year = {2008},
      booktitle = {IEEE Proceedings of ASAP'08 - 19th International Conference on Application-specific Systems, Architectures and Processors},
      title = {Lightweight DMA Management Mechanisms for Multiprocessors on FPGA},
      yy = {2008},
      author = {Antonino Tumeo and Matteo Monchiero and Gianluca Palemo and Fabrizio Ferrandi and Donatella Sciuto} }
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    @inproceedings {TumeoSamos2008,
      pages = {142-149},
      year = {2008},
      booktitle = {Proc. IEEE IC-SAMOS 2008 - Int. Conf. SAMOS VIII: Embedded Computer Systems: Architectures, MOdeling, and Simulation (IC-SAMOS 2008)},
      title = {Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems},
      yy = {2008},
      author = {Antonino Tumeo and Christian Pilato and Fabrizio Ferrandi and Pier Luca Lanzi and Donatella Sciuto} }
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      title = {Design Space Exploration for the Design of Reliable SRAM-based FPGA Systems},
      read = {Yes},
      pages = {332-340},
      month = {Oct},
      keywords = {SRAM-based FPGA, Genetic Algorithms, Design Space Exploration},
      doi = {http://dx.doi.org/10.1109/DFT.2008.8},
      booktitle = {Proc. IEEE Intl Symp on Defect and Fault Tolerance of of VLSI Systems},
      yy = {2008},
      mm = {10},
      author = {Cristiana Bolchini and Antonio Miele} }
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      year = {2008},
      title = {Fault Models and Injection Strategies in SystemC Specifications},
      read = {Yes},
      pages = {88-95},
      month = {Sep},
      keywords = {Fault Models, Fault Injection, ReSP},
      doi = {http://dx.doi.org/10.1109/DSD.2008.35},
      booktitle = {11th EUROMICRO Conf. on Digital System Design - Architectures, Methods and Tools},
      yy = {2008},
      mm = {9},
      author = {Cristiana Bolchini and Antonio Miele and Donatella Sciuto} }
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      pages = {673-678},
      booktitle = {Proc. IEEE 13th Asia and South Pacific Design Automation Conference (ASP-DAC)},
      title = {ReSP: A Non-Intrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration},
      yy = {2008},
      author = {Giovanni Beltrame and Cristiana Bolchini and Luca Fossati and Antonio Miele and Donatella Sciuto} }
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      pages = {1.1 - 1.6}. year = {2008},
      booktitle = {Proc. European Test Symposium, Poster Presentation},
      title = {Fault Models and Injection Strategies for a Reflective Simulationi Platform},
      author = {Cristiana Bolchini and Antonio Miele and Donatella Sciuto} }
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      doi = {http://dx.doi.org/10.1109/IJCNN.2008.4634324},
      pages = {3676-3680},
      month = {June},
      year = {2008},
      booktitle = {Proc. Intl Joint Conf. Neural Networks (IJCNN)},
      title = {k-NN classifiers: Investigating the k=k(n) relationship},
      yy = {2008},
      mm = {6},
      author = {Cesare Alippi and M. Fuhrman and Manuel Roveri} }
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